Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
Boundary Scan Waveforms and Timing Specifications
Symbol
t BTCP
t BTCH
t BTCL
t BTSU
t BTH
t BRF
t BTCO
t BTOZ
t BTVO
t BTCPSU
t BTCPH
t BTUCO
t BTUOZ
t BTUOV
Parameter
TCK [BSCAN test] clock cycle
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
TCK [BSCAN test] hold time
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
BSCAN test Capture register setup time
BSCAN test Capture register hold time
BSCAN test Update reg, falling edge of clock to valid output
BSCAN test Update reg, falling edge of clock to output disable
BSCAN test Update reg, falling edge of clock to output enable
Min.
40
20
20
8
10
50
8
10
Max.
10
10
10
25
25
25
Units
ns
ns
ns
ns
ns
mV/ns
ns
ns
ns
ns
ns
ns
ns
ns
39
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